1. Field of the Invention
This invention relates to a tactile array or planar or other surface inspection or registration during device fabrication and assembly.
2. Description of Background
Surface mounted semiconductor devices and carrier packages require a co-planar array of power and signal interconnect features, e.g., column grid array, ball grid array, C4 array, spring loaded contact array or pad array to make electrical connection with the corresponding circuits in the board, substrate, or interposer used to process the appropriate signal. For example, a ball grid array (BGA) is a design of semiconductor device that includes an array of discrete conductive elements in the form of conductive balls, or bumps, disposed on a surface of the semiconductor device to be mounted to a carrier substrate. The array of discrete conductive elements is aligned with a mating array of conductive terminal pads formed on the carrier substrate, such as a printed circuit board. After proper alignment, the discrete conductive elements are electrically connected to the terminal pads. Heat is applied to reflow the solder balls (bumps) to form the electrical connections between the carrier substrate and the semiconductor device contained in the package and the substrate.
The electrical and mechanical connections are one of the most critical elements of any interconnect array package structure. If the device is misaligned with respect to the carrier substrate and terminal pads, one or more of the discrete conductive elements of the array may not make sufficient contact with the corresponding terminals pad(s). Likewise, if the discrete conductive elements are irregular and/or defective in any manner, sufficient contact may not result. This, of course, may result in an inoperative or unreliable circuit. Present methods of interconnect array manufacturing and assembly utilize optical and laser based inspection methods. Often there are limited standoff heights and overhang restrictions due to the body of the package. These optical methods and the associated apparatus employed are relatively expensive and prone to false positives and negatives due to lighting, finish, reflectivity, and color variations in the interconnect feature surface to be analyzed.
Accordingly, there is a need for alternative technologies that are relatively less expensive, and less prone to false negatives and positives. Additionally there is a need for non-optical methods of inspection of a planar surface such as, for example, inspection of the heat sink attachment plane or die mounting surface for presence of surface flatness, parallelism, and/or particulate contamination.